Semiconductor Technology for Ultra-Large Scale Integrated Circuits and Thin Film Transistors VI (ULSIC vs TFT 6)
Integration of 2D materials for advanced devices: Challenges and opportunities
May 21-25, 2017
The size reduction and economics of integrated circuits, captured since the 1960’s in the form of Moore’s Law, is under serious challenge. Current industry roadmaps reveal that physical limitations include reaching aspects associated with truly atomic dimensions, and the cost of manufacturing is increasing such that only 2 or 3 companies can afford leading edge capabilities. To address some of the materials physical limitations, “2D materials” such as graphene, phosphorene, h-BN, and transition metal dichalcogenides have captured the imagination of the electronics research community for advanced applications in nanoelectronics and optoelectronics. Among 2D materials “beyond graphene,” some exhibit semiconducting behavior, such as transition-metal dichalcogenides (TMDs), and present useful bandgap properties for applications even at the single atomic layer level. Examples include “MX2”, where M = Mo, W, Sn, Hf, Zr and X = S, Se and Te In addition to the potentially useful bandgaps at the monolayer thickness scale, the atomically thin layers should enable thorough electric field penetration through the channel, thus enabling superior electrostatic control. Further, with such thin layers, the integration with suitable gate dielectrics can result in a mobility enhancement. From an interface perspective, the ideal TMD channel material should have a dearth of dangling bonds on the surface/interface, resulting in low interface state densities which are essential for efficient carrier transport. Moreover, the fact that TMDs incorporate d-orbital electrons may impart an increased functionality to devices not previously exploited in the more conventional semiconductors. Examples include spin-based and superconducting devices. The ideal TMD materials have much appeal, but the reality of significant densities of defects and impurities will surely compromise the intrinsic performance of such device technologies Integration of these materials with semiconductor industrial fabrication processes presents a number of challenges. For example, several synthesis methods have been employed to study 2D material thin film properties including mechanical/liquid exfoliation, chemical bath deposition, vapor phase deposition, and molecular beam epitaxy (MBE). From a manufacturability and cost perspective, vapor phase (including chemical and atomic layer) deposition are the subject of intense research activity in the electronics industry, while MBE methods facilitate the research of large thin films in advance of precursor development for CVD and ALD. This presentation will examine the state-of-the-art of these materials in view of our research on semiconductors, and the challenges and opportunities they present for electronic and optoelectronic applications.  This work is supported in part by the SWAN Center, a SRC center sponsored by the Nanoelectronics Research Initiative and NIST. It is also supported in part by Center for Low Energy Systems Technology (LEAST), one of six centers supported by the STARnet phase of the Focus Center Research Program (FCRP), a Semiconductor Research Corporation program sponsored by MARCO and DARPA, and the US/Ireland R&D Partnership (UNITE) under the NSF award ECCS-1407765. 1. S. J. McDonnell and R.M.Wallace, "Critical Review: Atomically-Thin Layered Films for Device Applications based upon 2D TMDC Materials", Thin Solid Films, 616, 482-501 (2016).
Robert M. Wallace, "Integration of 2D materials for advanced devices: Challenges and opportunities" in "Semiconductor Technology for Ultra-Large Scale Integrated Circuits and Thin Film Transistors VI (ULSIC vs TFT 6)", Yue Kuo (Texas A&M University, USA) Olivier Bonnaud (University of Rennes I, France) Eds, ECI Symposium Series, (2017). https://dc.engconfintl.org/ulsic_tft_6/26