Low-power display system enabled by combining oxide semiconductor and neural network technologies

Conference Dates

May 21-25, 2017


An oxide semiconductor (OS)-based field effect transistor (OSFET) exhibits the advantage of having an extremely low off-state current; moreover, the OSFET displays an off-state current that is ten orders of magnitude lower than that of a CMOS-FET [1]. Recently, numerous applications that harness this feature have been reported [2]. For instance, charge leakage from a data retention node of a pixel significantly decreases when the display incorporates OSFETs in its pixel circuit (OS display) [3, 4]. This minimizes degradation in the image quality when the displayed image is static despite using lower refresh rates. Consequently, the consumed power of the display driver circuit can be reduced by a large margin. This driving method is termed idling stop (IDS) driving. The OSFET’s low-leakage can also effectively enable a type of ULSICs that we term OS-large-scale integrated circuits (OSLSI) [5, 6].

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