What will come after V-NAND – Vertical resistive switching memory?
May 19-23, 2019
The NAND flash memory serves as the key enabler of the flourishing of portable handheld information devices, such as the cellular phone. The recent upsurge in the sales of vertical NAND flash memory (V-NAND) entails a further increase in the available information capacity at the edge devices and the servers with higher performance and lower power consumption compared with the magnetic hard-disc drives. Nonetheless, there will certainly be an upper limit for the number of stacked layers, which will be the point at which further memory density increase will stop. While V-NAND is a supreme outcome of semiconductor memory technologies, it still relies on conventional Si-based materials. The newly explored memory materials and concepts, such as the resistance-based memories, can, therefore, be an appealing contender to or successor of V-NAND. In this talk, the current state of V-NAND is first briefly looked into, and then the eventual limitation of memory density increase and performance boost are discussed. Most importantly, the possible strategies of integrating the resistance-based memories into the vertical architecture are then discussed. Among them, V-NAND-like vertical resistance-switching random access memory will be focused. The figure below shows the schematic diagram for this type of vertical device (a), and its equivalent circuit diagram (b). For this application, higher performance of channel material, other than the current amorphous-like Si, is necessary. For such purpose, the programming characteristics of charge trap flash memory device adopting amorphous In2Ga2ZnO7 (a-IGZO) oxide semiconductors as channel layer were evaluated, where the a-IGZO thin film was grown by either metal-organic chemical vapor deposition (MOCVD) or RF-sputtering processes. The MOCVD film showed superior performance to the sputtered film, perhaps due to the involvement of the appropriate level of hydrogen.
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Cheol Seong Hwang, "What will come after V-NAND – Vertical resistive switching memory?" in "Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors VII", Yue Kuo, Texas A&M University, USA Junichi Murota, Tohoku University, Japan Yukiharu Uraoka, Nara Advanced Institute of Science and Technology, Japan Yasuhiro Fukunaka, Kyoto University, Japan Eds, ECI Symposium Series, (2019). https://dc.engconfintl.org/ulsic_tft_vii/49