Title
Operation analysis of resistive switching of CBRAM using in-situ TEM
Conference Dates
May 19-23, 2019
Abstract
Resistive random access memories (ReRAMs) have great potential as a candidate for next-generation nonvolatile memories for the high speed, high density storage per cost [1] and their ability to the neural network devices. In order to analyze the reliability of ReRAMs and to find out the origin of the failures, it indispensable to understand the resistive switching mechanism. Since the transmission electron microscopy (TEM) provides a high resolution images of the nanostructure, in-situ TEM should be a powerful tool for the analysis. In our in-situ TEM system [2, 3], repeatable switching characteristics, are achieved together with clear images of formation and rupture of conductive filaments corresponding to the low and high resistance states.
In this work, we used several kinds of Cu-based ReRAM (CBRAM: Conductive Bridge RAM). TEM samples are fabricated by two methods. One is an ion-shadow method [4, 5], which is an ion milling technique with carbon mask particles. The other is FIB that is a conventional technique to make a sample observable in TEM. Almost the same characteristics as those measured at the outside of TEM by the use of real ReRAM cells are achieved in TEM by the both method. Fig. 1 shows an example of I-V switching characteristics of Cu-Te based ReRAM [6, 7] and the corresponding TEM images [2, 3]. It was clearly shown that a dark spot corresponding to a conductive filament appeared by SET and erased after RESET. These resistive switching characteristics by I-V sweep were reproducible at least 60 cycles in TEM. In addition, SET/RESET pulse operation more than 100k times are confirmed during TEM observation as shown in Fig. 2.
These results clearly indicate that the in-situ TEM will be a powerful tool to guarantee the reliability of ReRAMs.
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Recommended Citation
Yasuo Takahashi, Atsushi Tsurumaki-Fukuchi, and Masashi Arita, "Operation analysis of resistive switching of CBRAM using in-situ TEM" in "Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors VII (ULSIC VS TFT 7)", Yue Kuo, Texas A&M University, USA Junichi Murota, Tohoku University, Japan Yukiharu Uraoka, Nara Advanced Institute of Science and Technology, Japan Yasuhiro Fukunaka, Kyoto University, Japan Eds, ECI Symposium Series, (2019). https://dc.engconfintl.org/ulsic_tft_vii/48